hj;SrSSKrSSKrSSKrSSKrSSKrSSKrSSKrSSKJ r SSK J r Sr "SS5r S rS rS r\ "\5r"S S \5r"SS\\5r"SS\\5rg)zDTypes and functions to manage information on CPU microarchitectures.N)FEATURE_ALIASES)LazyDictionarycF^[R"T5U4Sj5nU$)z`Decorator that automatically converts a known target name to a proper Microarchitecture object. c>[U[5(a/U[;aSn[UR U55e[UnT"X5$)Nz "{0}" is not a valid target name) isinstancestrTARGETS ValueErrorformat)selfothermsgfuncs >lib/python3.13/site-packages/archspec/cpu/microarchitecture.py_impl"coerce_target_names.._implsE eS ! !G#8 E!233ENED  ) functoolswraps)rrs` rcoerce_target_namesrs' __T!! Lrc\rSrSrSr\rSSjr\S5r Sr \ S5r Sr \ S5r\ S 5r\ S 5r\ S 5r\ S 5rS rSrSr\S5r\S5rSr\SSj5rSrSrg)Microarchitecture%a8Represents a specific CPU micro-architecture. Args: name (str): name of the micro-architecture (e.g. skylake). parents (list): list of parents micro-architectures, if any. Parenthood is considered by cpu features and not chronologically. As such each micro-architecture is compatible with its ancestors. For example "skylake", which has "broadwell" as a parent, supports running binaries optimized for "broadwell". vendor (str): vendor of the micro-architecture features (set of str): supported CPU flags. Note that the semantic of the flags in this field might vary among architectures, if at all present. For instance x86_64 processors will list all the flags supported by a given CPU while Arm processors will list instead only the flags that have been added on top of the base model for the current micro-architecture. compilers (dict): compiler support to generate tuned code for this micro-architecture. This dictionary has as keys names of supported compilers, while values are list of dictionaries with fields: * name: name of the micro-architecture according to the compiler. This is the name passed to the ``-march`` option or similar. Not needed if the name is the same as that passed in as argument above. * versions: versions that support this micro-architecture. generation (int): generation of the micro-architecture, if relevant. cpu_part (str): cpu part of the architecture, if relevant. cXlX lX0lX@lXPlX`lXplSUlSUlSUl gN) nameparentsvendorfeatures compilers generationcpu_part _ancestors_generic_family)r rrrr r!r"r#s r__init__Microarchitecture.__init__Js<    "$   rc^URcNURSSmURH(nTRU4SjUR55 M* TUlUR$)z,All the ancestors of this microarchitecture.Nc36># UHoT;dM Uv M g7fr).0avalues r .Microarchitecture.ancestors..bsK(81UNQQ(8s  )r$rextend ancestors)r parentr.s @rr2Microarchitecture.ancestors\sS ?? "LLOE,, K(8(8KK'#DOrc [[U5/URVs/sHn[U5PM sn-5$s snf)z9Returns a set of the nodes in this microarchitecture DAG.)setr r2r xs r_to_setMicroarchitecture._to_setfs4CI;$..!A.Q#a&.!AABB!As= c[U[5(d[$URUR:H=(a URUR:H=(a UR UR :H=(ay UR UR :H=(aY URUR:H=(a9 URUR:H=(a URUR:H$r) rrNotImplementedrrr rr!r"r#r rs r__eq__Microarchitecture.__eq__ls%!233! ! II # 0 u||+ 0 / 0  - 0%//1  0 5#3#33  0  / rc,[UR5$r)hashrr s r__hash__Microarchitecture.__hash__{sDIIrc X:X+$rr+r=s r__ne__Microarchitecture.__ne__~s   rcz[U[5(d[$UR5UR5:$rrrr<r9r=s r__lt__Microarchitecture.__lt__-%!233! !||~ //rc X:H=(d X:$rr+r=s r__le__Microarchitecture.__le__ 04<0rcz[U[5(d[$UR5UR5:$rrIr=s r__gt__Microarchitecture.__gt__rLrc X:H=(d X:$rr+r=s r__ge__Microarchitecture.__ge__rPrcZURRnUS-nURU5$)Nz({0.name!r}, {0.parents!r}, {0.vendor!r}, {0.features!r}, {0.compilers!r}, generation={0.generation!r}, cpu_part={0.cpu_part!r})) __class____name__r )r cls_namefmts r__repr__Microarchitecture.__repr__s4>>** ' ' zz$rcUR$rrrBs r__str__Microarchitecture.__str__s yyrc [U[5(d.Sn[UR[[ U5555eXR ;ag[ RRUS5nU"U5$)Nz3only objects of string types are accepted [got {0}]Tcg)NFr+r8s r0Microarchitecture.__contains__..sur) rr TypeErrorr typer rfeature_aliasesget)r featurer match_aliass r __contains__Microarchitecture.__contains__se'3''GCCJJs4='9:; ; mm #(77;;G_U 4  rc:URc~U/UR-Vs/sHoR(aMUPM nnSnUSSRSU55S3- n[U5S:XdU5eUR 5UlUR$s snf)z9Returns the architecture family a given target belongs toz>a target is expected to belong to just one architecture familyz[found , c38# UHn[U5v M g7frr r,r8s rr/+Microarchitecture.family..s&=u!s1vvu]r)r&r2joinlenpop)r r8rootsrs rfamilyMicroarchitecture.familys << !% 7K 71{{Q 7EKRC WTYY&=u&==>a@ @Cu:? 'C '? 99;DL|| Ls BBcURcAU/UR-Vs/sHoRS:XdMUPM nn[USS9UlUR$s snf)zBReturns the best generic architecture that is compatible with selfgenericc,[UR5$r)rxr2rds rre+Microarchitecture.generic..s AKK8Hr)key)r%r2rmax)r r8genericss rr~Microarchitecture.genericsW == $(6DNN#:T#:ahh)>S#:HT.HIDM}}Us AAc $[UR5[UR5[SUR55UR UR Vs/sHn[U5PM snURURS.$s snf)z3Returns a dictionary representation of this object.c38# UHn[U5v M g7frrrrss rr/,Microarchitecture.to_dict..s=}!s1vv}ru)rrr r"rr!cpupart) r rrsortedr r"rr!r#r7s rto_dictMicroarchitecture.to_dictsk N$++&=t}}==//(, 5 1A 5}}  6sB c [USUSVs/sH n[UPM snUS[US5URS05URSS5URSS 5S 9$s snf) z?Construct a microarchitecture from a dictionary representation.rrrr r!r"rr)rrrr r!r"r#)rr r6rj)datar8s r from_dictMicroarchitecture.from_dictss!f)-i9AWQZ9>j)*hh{B/xx a0XXi,  9sA- cNXRR;agXR;aZURVs/sHo1UR;dMUPM snSnSnURXUR5n[ U5e[ R "SU5(d Sn[U5eURUnSnUHvnU"X5(dMUSn URSUR5 URS S 5n U (a[R"U 5 U R"S0UD6n U s $ S nU(a-UVs/sHo3S PM n nUS SRU 5S3- nOUS- nURURX5n[ U5es snfs snf)aReturns a string containing the optimization flags that needs to be used to produce code optimized for this micro-architecture. The version is expected to be a string of dot separated digits. If there is no information on the compiler passed as argument the function returns an empty string. If it is known that the compiler version we want to use does not support this architecture the function raises an exception. Args: compiler (str): name of the compiler to be used version (str): version of the compiler to be used Raises: UnsupportedMicroarchitecture: if the requested compiler does not support this micro-architecture. ValueError: if the version doesn't match the expected format rrzf'{0}' compiler is known to optimize up to the '{1}' microarchitecture in the '{2}' architecture familyz^(?:\d+\.)*\d+$zXinvalid format for the compiler version argument. Only dot separated digits are allowed.cUSRS5up#[U5up$[U5up4[U5upSnU"U5nU(aU"U5nX!:agU(aU"U5nX1:agg)Nversions:cD[SURS555$)Nc38# UHn[U5v M g7fr)int)r,ys rr/fMicroarchitecture.optimization_flags..satisfies_constraint..tuplify..s<^SVV^ru.)tuplesplit)vers rtuplifySMicroarchitecture.optimization_flags..satisfies_constraint..tuplifys.satisfies_constraints',Z'8'>'>s'C $K0 > )&*nnPnAKK8O1nPQRSKF **XK4F4FGC.s3 3xx*G449 )- -x0  2,N#N<<*73 ))&$))<#1"4"4Z"F"MM/2!((:>: ,Z /<=}!* }H= 7 (8K7LAN NC 6 6CjjH6*3//GQ|>sFFF") r$r&r%r!r#r r"rrrN)rr)returnr)rY __module__ __qualname____firstlineno____doc__rrir'propertyr2r9rr>rCrFrJrNrRrUr\r`rmr{r~r staticmethodrr__static_attributes__r+rrrr%sD&O$C     !!00 1100 11  !        ^0rrc,[U/S[50S9$)z{Returns a generic micro-architecture with no vendor and no features. Args: name (str): name of the micro-architecture r~)rrr r!)rr6r_s rgeneric_microarchitecturerAs T2i#%[] ^^rc[R"S[U55nU(dgURS5nURS5nX#4$)zDecomposes the version passed as input in version number and suffix and returns them. If the version number or the suffix are not present, an empty string is returned. Args: version (str): version to be decomposed into its components z([\d.]*)(-?)(.*))rrr)rrr group)rrversion_numbersuffixs rrrJsB HH(#g, 7E [[^N [[^F  !!rc^U4Sjm0n[RRRSnUHnX ;aM T"X!U5 M [R "5nUR U[U55 U$)zReturns a dictionary of the known micro-architectures. If the current host platform is unknown adds it too as a generic target. c B>XnUSnUHnXR;aM T "XQU5 M UVs/sHoRRU5PM nnUSn[US5nURS05n URSS5n URSS5n [XXxXU S 9X 'g s snf) a>Recursively fills targets by adding the micro-architecture passed as argument and all its ancestors. Args: name (str): micro-architecture to be added to targets. data (dict): raw data loaded from JSON. targets (dict): dictionary that maps micro-architecture names to ``Microarchitecture`` objects fromrr r!r"rrr)r"r#N)rjr6r) rrtargetsvalues parent_namesr3rrr r!r"r#fill_target_from_dicts rr8_known_microarchitectures..fill_target_from_dictcsf~ "F  !& 8 # 6BB\6;;v&\B!vj)*JJ{B/ ZZ a0 ::i,) 6YX`  CsBmicroarchitectures)archspeccpuschema TARGETS_JSONplatformmachinerr) known_targetsrr host_platformrs @r_known_microarchitecturesr^ss  >M <<   + +,@ AD  d-8 $$&M],Em,TU rc\rSrSrSrSrg) ArchspecErroriz%Base class for errors within archspecr+NrYrrrrrr+rrrrs/rrc\rSrSrSrSrg)riz[Raised if a compiler version does not support optimization for a given micro-architecture. r+Nrr+rrrrsrrc\rSrSrSrSrg)rizHRaised when an invalid format is used for compiler versions in archspec.r+Nrr+rrrrsRrr)rrrrrrarchspec.cpu.aliasarchspec.cpu.schemaaliasrrrrrrrrr Exceptionrr rrr+rrrs K ""$Y0Y0x_"(0h 2 30I0=* S]JSr